Technologies Used
Retro Game Console (NES-Style)
๐ฏ Project Overview
This project involves developing a retro-style game console inspired by the classic Nintendo Entertainment System (NES). The system features a custom-designed Picture Processing Unit (PPU) implemented on FPGA, integrated with an ARM processor to create a heterogeneous computing platform for running 2D games.
Project Type: Embedded Systems, FPGA Design, and Game Development
Duration: Winter 2026
Team Size: 5 students
Status: Coming Soon (In Development)
โจ Planned Key Features
1. Custom Hardware Platform
- Heterogeneous ARM/FPGA architecture
- Custom-designed Picture Processing Unit (PPU)
- Hardware-accelerated graphics rendering
- NES-inspired design and aesthetics
2. Picture Processing Unit (PPU)
- FPGA-based graphics processor
- Sprite rendering engine
- Background tile system
- Color palette management
- Hardware scrolling capabilities
3. 2D Game Development
- Classic platformer game in C++
- Retro pixel art graphics
- Smooth 60 FPS gameplay
- Collision detection system
- Score and level management
4. Product Lifecycle Management (PLM)
- Structured development process
- Team coordination and task management
- Version control and documentation
- Testing and quality assurance
๐๏ธ System Architecture
Hardware Platform
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโ
โ Heterogeneous Platform โ
โโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโโค
โ โ
โ โโโโโโโโโโโโโโโโ โโโโโโโโโโโโโโโโ โ
โ โ โ โ โ โ
โ โ ARM Processorโโโโโบโ FPGA โ โ
โ โ โ โ โ โ
โ โ - Game Logicโ โ - Custom PPUโ โ
โ โ - Physics โ โ - Graphics โ โ
โ โ - Input โ โ - Rendering โ โ
โ โ - Audio โ โ - DMA โ โ
โ โ โ โ โ โ
โ โโโโโโโโโโโโโโโโ โโโโโโโโโโโโโโโโ โ
โ โ โ โ
โ โโโโโโโโโโฌโโโโโโโโโโโโ โ
โ โ โ
โโโโโโโโโโโโโโโโโโโโผโโโโโโโโโโโโโโโโโโโโโโโ
โ
โโโโโโโโดโโโโโโโ
โ Display โ
โ (VGA/HDMI) โ
โโโโโโโโโโโโโโโ
Custom PPU Architecture
The Picture Processing Unit will implement:
- Sprite Engine: Hardware-accelerated sprite rendering (up to 64 sprites)
- Background Engine: Tile-based background system with scrolling
- Color Palette: 256-color palette with 4 palettes per sprite
- DMA Controller: Direct Memory Access for fast data transfer
- Video Output: VGA or HDMI output at 640x480 resolution
๐ป Technical Stack
Hardware Development
- FPGA: Xilinx or Intel FPGA board
- Processor: ARM Cortex-A series
- HDL: Verilog or VHDL for PPU design
- Tools: Vivado Design Suite, Quartus Prime
Software Development
- Language: C++ for game development
- Cross-Compilation: ARM toolchain
- Graphics API: Custom API for PPU communication
- Build System: CMake or Makefile
Development Tools
- Version Control: Git
- PLM Tools: Jira, Confluence
- Debugging: JTAG debugger, logic analyzer
- Testing: Hardware-in-the-loop testing
๐ฎ Game Design
Planned Game Concept
A classic 2D platformer featuring:
- Genre: Action platformer
- Setting: Retro pixel art world
- Gameplay: Jump, run, collect items, defeat enemies
- Levels: Multiple levels with increasing difficulty
- Power-ups: Special abilities and collectibles
Technical Specifications
- Resolution: 256x240 pixels (NES-style) or 320x240
- Frame Rate: 60 FPS
- Sprites: 16x16 or 8x8 pixel sprites
- Tiles: 8x8 pixel background tiles
- Colors: 256-color palette
- Audio: Chiptune-style music and sound effects
This project is currently in development as part of the Winter 2026 semester at Universitรฉ de Sherbrooke. It represents an advanced embedded systems project combining FPGA design, ARM programming, and game development.
Status Update: Project details will be updated as development progresses. Check back for updates on implementation progress and final results!